Design of Audio Processing System Based on DSP and ARM
Time:2022-11-08
Views:1520
1 Introduction
With the rapid development of computer technology, electronic technology and communication technology, audio processing technology has been widely used in many fields. Such as mobile phones and IP phones in the communication field, MP3 and CD players in consumer electronic products, and voice recognition and voice control systems in the control field [1]. In view of the powerful digital signal processing ability of DSP and the good real-time performance of ARM processor, combined with the interface characteristics of the audio codec chip TLV320AIC23, this paper expounds the hardware interface design and software programming of the audio processing system composed of the three, and provides an effective and practical audio processing system scheme.
TLV320AIC23 (AIC23 for short) is a high-performance stereo audio codec Codec chip of TI Company. Its internal integrated analog-to-digital converters (ADCs) and digital to analog converters (DACs) use the multi bit Sigma Delta technology with oversampling digital interpolation filtering. The data transmission word length is 16, 20, 24 and 32 bits, and the sampling frequency range is 8kHz to 96kHz. The signal-to-noise ratio of ADC and DAC reaches 90dB and 100dB respectively. The built-in headphone output amplifier supports MIC and LINE IN input modes, and has programmable gain adjustment for both input and output. In addition, AIC23 has low power consumption. The power is only 23mW in playback mode, and less than 15uW in power-saving mode. Therefore, AIC23 becomes a digital audio application
The ideal choice in the field [2], plays an important role in a variety of digital products, such as audio codec in mobile phones, MP3, DV cameras.
TMS320VC5402 (VC5402 for short) is an excellent 16 bit fixed-point DSP of TI Company, with fast operation speed and instruction execution speed of 100 MIPS. It has its own on-chip memory and a variety of on-chip peripherals, which are widely used in speech codec and communication fields [3].
S3C4510B (4510B for short) is a low-cost, high-performance 16/32 bit RIS microcontroller of Samsung. Its excellent ARM7TDMI core and general microprocessor macro cell make it an ideal choice for user customized application development [4].
2 System hardware design
The audio processing system is mainly composed of the above three processing chips: ARM control unit, DSP signal processing unit and AIC23 audio acquisition unit. The system principle block diagram is shown in Figure 1.
AIC23 is a programmable chip, with 11 16 bit registers inside. Programming these registers can obtain the required sampling frequency, input/output gain, transmission data format, etc. The control interface has two working modes, SPI and I2C, which are selected by the MODE pin on the chip: MODE=0 is I2C mode, MODE=1 is SPI mode. Since the ARM 4510B also has an I2C interface, the I2C mode is selected. The I2C interface address of AIC23 is determined by the pin status. When=0, the address is 0011010, and when=1, the address is 0011011. SDIN and SDA are data lines, and SCLK and SCL are serial clock lines. VC5402 has two multi-channel buffered serial ports. The McBSP0 is selected to communicate with AIC23. The signal connection is shown in Figure 1. In the figure, AIC23 works in the main mode, and clock signal, frame synchronization signal BFSX0 and BFSR0 of DAC and ADC are provided by AIC23. The communication between the DSP VC5402 and ARM 4510B is realized through the HPI interface on the DSP.
3 System software design
The system consists of ARM system and DSP system. ARM, as the main controller, manages the working process of the whole system, runs relevant applications, schedules multiple tasks, and completes the communication with external DSP system or other peripherals. DSP mainly completes audio data acquisition and signal processing, and sends the processed data to ARM for the application program to call. This design can greatly improve the working efficiency of the system, which is also a typical design scheme of current embedded systems, mobile handheld devices such as PDA, mobile phones, etc.
What we need to do here is to program the control interface of AIC23 to make it work in the required mode. Then initialize the McBSP of DSP for AD, DA conversion and data processing.
3.1 ARM programming
The programming of ARM in the system mainly involves the initialization of AIC23, making it enter the normal working state, and collecting and processing audio data. This requires setting the I2C bus special function registers of 4510B: control status register IICCON, prescaler register IICPS and shift buffer register IICBUF. See Table 1 [5] for register related descriptions.
Table 1 4510B I2C bus special function register
For a detailed description of the relevant settings of the 11 control registers of AIC23, see Reference 2. The setting here is: left and right channel line input mute; The volume of the left and right channels of the headset is 6dB; Enable DAC with microphone volume of 20dB as ADC input; Enable ADC high pass filtering; Power supply enabling of circuits of all parts of the chip; The chip works in the main mode, the sampling data length is 16 bits, and the DSP data format is adopted (two data words follow the synchronization frame); The sampling rate is 88.2KHz (the external crystal oscillator is 11.2896MHz); Enable digital interface.
The I2C bus timing when programming AIC23 is shown in Figure 2. After setting the clock frequency of I2C, first send the start condition (SCLK is high level, SDI switches from high level to low level), then send the device address of AIC23. After the device address is sent, send the address of the corresponding AIC23 register, then send the data set for this register, and finally send the stop condition (SCLK is high level, SDI switches from low level to high level). Note that the register address here is 7 bits, the register data is 9 bits, and the I2C bus transmits data in bytes. Therefore, when programming the AIC23 register, the first byte includes the register address B15-B9 of the first 7 bits and the highest bit B8 of the setting data, and the second byte is B7-B0 of the last 8 bits of the setting data.
3.2 Audio data acquisition and playback
After initializing AIC23, initialize DSP and McBSP0, and then collect and play audio data. The voice signal is collected by the microphone and output by the headset after digital filtering. The receiving interrupt of McBSP0 is used to save data, and the FIR digital filtering subroutine is used to process audio data. The program flow is shown in Figure 3.
Initialize McBSP0 to make it work in coordination with AIC23. Here, configure each control register of McBSP0 according to hardware design and software requirements. The main settings of the serial port in this system are: right alignment of received data, with sign expansion; Receive interrupt enable; Off chip transmission and reception frame signals and transmission and reception clock signals are provided; The sending and receiving frame synchronization signals are valid at low level; Sampling, transmitting and receiving data at the rising edge of the clock; Each frame transmits and receives two 16 bit word data [6].
The data receiving part can be realized in the DSP interrupt program with the following statements:
mvkd drr10,*ar5 ; Save Data
pshd *ar5+% ; Data pushed onto the stack
popd new_ ad ; Pop data from stack to custom register
The procedures related to FIR filtering are as follows:
ld new_ ad,a ; Load new data into accumulator
stm #1,ar0 ; Double operand increment
stm #N,bk ; Set the length of the circular buffer, that is, FIR filtering stages (N is the filtering stages)
stl a,*ar3+% ; New data is sent to the buffer pointed to by ar3
rptz a,#(N-1) ; Repeat N-1 level multiplication and addition
mac *ar2+0%,*ar3+0%,a ; Ar2 is the coefficient pointer, and the result is in the high order of the accumulator
sth a,temp ; Save calculation results
ld temp,a ; Put the result in the low position of the accumulator
…
stlm a,dxr10 ; Send the data in the accumulator position to the serial port transmission register
… …
Based on the corresponding settings of AIC23 and DSP, 21 level coefficient symmetrical FIR digital filtering is adopted to filter the voice signal input through the microphone. The filtering result is output by the headset, and the actual effect is good. The collected audio data can also be transmitted to ARM through the HPI interface for application calling.
3.3 Speech recognition application test
The basic principle of speech recognition is feature extraction of speech signals. At present, the commonly used speech recognition algorithms include DTW (Dynamic Time Warping) based on pattern matching, HMM (Hidden Markov Model) based on statistical model, and neural network based recognition (DNN, NPN, TDNN) [7]. In order to facilitate the application test of the system, this paper adopts the simplest method to debug the system, namely, the recognition of English vowels. The basic principle is to extract the frequency characteristics of vowel letters. Each vowel has three obvious formant frequencies in its frequency domain response, and the first formant is the easiest to identify, so that effective vowel recognition can be carried out. When extracting the frequency characteristics of the first formant, the "zero crossing" method (counting the number of times a single frame signal waveform crosses the zero point - zero crossing rate) is used to convert the analysis of the signal frequency characteristics into time domain analysis. The calculated zero crossing rate can be compared with the theoretical value to achieve vowel recognition. Figure 4 shows the time domain and frequency domain diagrams of vowel "A" respectively.
The obvious first formant can be seen from the frequency domain sampling diagram. At this time, the calculation of the zero crossing rate of the signal in the time domain sampling can more accurately identify vowel A. The sampling point that is approximately equal to zero in the calculation of the zero crossing rate is usually a weak interference, which can be ignored. After verification, the recognition rate of this simple monophonic recognition method is more than 80%, which proves the practicability of the audio processing system.
4 Conclusion
This paper describes the design and implementation of audio processing system based on signal processing and embedded applications. The hardware design, software programming and application of the system are discussed. Through ARM‘s control of audio chip AIC23 and DSP‘s communication with AIC23, the functions of audio signal acquisition, processing, output and simple speech recognition are realized. The application framework of audio processing system based on ARM and DSP is constructed, which provides a feasible software and hardware solution for further data processing and control applications.
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