How many methods do you know to achieve level conversion
Time:2023-05-15
Views:945
1. TTL level
Output high level>2.4V, output low level<0.4V. At room temperature, the general output high level is 3.5V, and the output low level is 0.2V. Minimum input high level and low level: input high level>=2.0V, input low level<=0.8V, and noise tolerance is 0.4V.
2. CMOS level:
1 logic level voltage is close to the power supply voltage, and 0 logic level is close to 0V. And it has a wide noise tolerance.
3. Level conversion circuit:
Because the high and low level values of TTL and COMS are different, level conversion is required when connecting to each other: using two resistors to divide the voltage of the level, there is nothing profound. ha-ha
4. OC gate, that is, open collector gate circuit, OD gate, that is, drain open circuit gate circuit, must be external pull-up resistor and power supply
Use the switch level as the high and low level. Otherwise, it is generally only used as a switch for high voltage and high current loads, so it is also called a driving gate circuit.
5. Comparison of TTL and COMS circuits:
5.1) The TTL circuit is a current control device, while the coms circuit is a voltage control device.
The TTL circuit has fast speed, short transmission delay time (5-10ns), but high power consumption. The COMS circuit has slow speed, long transmission delay time (25-50ns), but low power consumption. The power consumption of the COMS circuit itself is related to the pulse frequency of the input signal. The higher the frequency, the hotter the chip set, which is a normal phenomenon.
5.3) Locking effect of COMS circuit:
The COMS circuit experiences a sharp increase in internal current due to excessive input current, and the current continues to increase unless the power supply is cut off. This effect is called the locking effect. When a locking effect occurs, the internal current of COMS can reach over 40mA, which can easily burn the chip.
Defense measures:
5.1.1) Add clamping circuits at the input and output terminals to ensure that the input and output do not exceed the specified voltage.
5.3.2) Add decoupling circuit at the power input end of the chip to prevent transient high voltage at the VDD end.
5.3.3) Add a line current resistor between the VDD and the external power supply to prevent it from entering even if there is a large current.
When the system is powered by several power sources, the switches should be in the following order: when turned on, first turn on the power supply of the COMS circuit, and then turn on the power supply of the input signal and load; When turning off, first turn off the power supply of the input signal and load, and then turn off the power supply of the COMS circuit.
6. Precautions for using COMS circuits
6.1) COMS circuit is a voltage control device, which has a high total input impedance and strong ability to capture interference signals. Therefore, do not hang unused pins in the air. Connect pull-up resistor or pull-down resistor to give it a constant level.
When connecting the input terminal to the signal source of the low internal group, a current limiting resistor should be connected in series between the input terminal and the signal source to limit the input current to within 1mA.
When extending the signal transmission line, connect a matching resistor at the end of the COMS circuit.
When the input terminal is connected to a large capacitor, the resistance should be indirectly protected between the input terminal and the capacitor. The resistance value is R=V0/1mA. V0 is the voltage on the external capacitor.
If the input current of COMS exceeds 1mA, it may burn out the COMS.
7. Input load characteristics in TTL gate circuits (handling special cases of input resistance):
When suspended, it is equivalent to connecting the input terminal to a high level. Because at this point, it can be seen as an infinite resistor connected to the input terminal.
7.2) Connect a 10K resistor in series at the input end of the gate circuit before inputting a low level, and the input end will present a high level instead of a low level. Because the input load characteristics of the TTL gate circuit indicate that only when the series resistance at the input end is less than 910 ohms, can the low-level signal it receives be recognized by the gate circuit. The input end will remain at a high level no matter how large the series resistance is. This must be noted. The COMS gate circuit does not need to consider these.
8. The TTL circuit has an OC gate with open collector, and the MOS tube also has an OD gate with open drain corresponding to the collector. Its output is called open drain output.
When the OC gate is cut off, there is leakage current output, which is leakage current. Why is there leakage current? That‘s because when the transistor is cut off, its base current is about 0, but it‘s not really 0, and the current passing through the collector of the transistor is not really 0, but about 0. And this is the leakage current. Open drain output: The output of the OC gate is the open drain output; The output of the OD gate is also an open drain output. It can absorb a large amount of current, but cannot output current outward. Therefore, in order to input and output current, it should be used together with the power supply and pull-up resistor. OD gates are generally used as output buffers/drivers, level converters, and to meet the needs of absorbing large load currents.
9. What is totem pole? What is the difference between it and open drain circuit?
In TTL integrated circuit, the output connected with pull up triode is called totem pole output, and the output not connected is called OC gate. Because TTL is a three-stage barrier, and the totem pole is a push-pull connection between two three-stage tubes. So push pull is a totem. General totem output, high-level 400UA, low-level 8MA
10. TTL high level 3.6~5V, low level 0V~2.4VCMOS level Vcc can reach 12V
The CMOS circuit outputs a high level of approximately 0.9Vcc and a low level of approximately 0.1Vcc.
The input terminals that are not used in CMOS circuits cannot be suspended, which can cause logical confusion.
The input terminal that is not used in TTL circuits is suspended at a high level
In addition, the power supply voltage of CMOS integrated circuits can vary over a large range, so the requirements for the power supply are not as strict as those for TTL integrated circuits.
11.They can be compatible with TTL levels
The TTL level is 5V, and the CMOS level is generally 12V.
Because the TTL circuit power supply voltage is 5V, the CMOS circuit power supply voltage is generally 12V.
A 5V level cannot trigger CMOS circuits, while a 12V level can damage TTL circuits, making them incompatible and mismatched.
12. TTL level standard
Output L:<0.8V; H：>2.4V。
Input L:<1.2V; H：>2.0V
The low level output of TTL devices should be less than 0.8V, and the high level should be greater than 2.4V. Input, below 1.2V is considered 0, above 2.0
Think of it as 1.
CMOS level:
Output L:<0.1 * Vcc; H：>0.9*Vcc。
Input L:<0.3 * Vcc; H：>0.7*Vcc.
Can the pins between microcontrollers, DSPs, and FPGAs be directly connected? Generally, the same voltage is acceptable, but it is best to carefully check the values of VIL, VIH, VOL, and VOH in the technical manual to see if they can match (VOL should be less than VIL, VOH should be greater than VIH, referring to a connection within a connection). Some are not problematic in general applications, but the parameters may not match well, and in some cases, they may not be stable enough, or different batches of devices may not operate.
For example, the output of 74LS devices and the device connected to 74HC. In general, it can run well, but there is a mismatch in parameters, and in some cases it cannot run.
12.1. The upper and lower limits of the level are defined differently, and CMOS has a larger anti noise region.
If both are powered by 5 volts, TTL usually looks like 1.7V and 3.5V, while CMOS usually looks like 2.2V and 2.9V, which is not accurate and is for reference only.
12.2。 The current driving capability varies, with TTL typically providing a driving capability of 25 milliamperes, while CMOS typically provides around 10 milliamperes.
12.3。 The required current input size also varies, generally around 2.5 milliamperes are required for TTL, and CMOS hardly requires current input.
12.3。 Many devices are compatible with TTL and CMOS, as explained in the datasheet. If speed and performance are not considered, general devices can be interchanged. However, it should be noted that sometimes load effects may cause abnormal circuit operation, as some TTL circuits require the input impedance of the next level as the load to function properly.
13. Comparison of TTL and COMS circuits:
13.1. The TTL circuit is a current control device, while the coms circuit is a voltage control device.
13.2. The TTL circuit has fast speed, short transmission delay time (5-10ns), but high power consumption. The COMS circuit has slow speed and long transmission delay time (25-50ns), but low power consumption. The power consumption of the COMS circuit itself is related to the pulse frequency of the input signal. The higher the frequency, the hotter the chip set, which is a normal phenomenon.
13.3. Locking effect of COMS circuit:
The COMS circuit experiences a sharp increase in internal current due to excessive input current, and the current continues to increase unless the power supply is cut off. This effect is called the locking effect. When a locking effect occurs, the internal current of COMS can reach over 40mA, which can easily burn the chip.
14. Defense Measures:
(14.1) Add clamping circuits at the input and output terminals to ensure that the input and output do not exceed the specified voltage.
(14.2) The power input end of the chip is equipped with a decoupling circuit to prevent transient high voltage from occurring at the VDD end.
(14.3) Add a line current resistor between the VDD and the external power supply to prevent it from entering even if there is a large current.
(14.4) When the system is powered by several power sources, the switches should be in the following order: when turned on, first turn on the power supply of the COMS circuit, and then turn on the power supply of the input signal and load; When turning off, first turn off the power supply of the input signal and load, and then turn off the power supply of the COMS circuit.
15. Precautions for using COMS circuits
(15.1) COMS circuit is a voltage control device, which has a high total input impedance and strong ability to capture interference signals. So,
Do not hang unused pins in the air. Connect pull-up resistor or pull-down resistor to give it a constant level.
(15.2) When connecting the input end to a low internal group signal source, a current limiting resistor should be connected in series between the input end and the signal source to ensure that the input voltage
The flow is limited to within 1mA.
(15.3) When extending the signal transmission line, connect a matching resistor at the end of the COMS circuit.
When the input terminal is connected to a large capacitor, the resistance should be indirectly protected between the input terminal and the capacitor. The resistance value is R=V0/1mA. V0 is external
The voltage on the boundary capacitance.
If the input current of COMS exceeds 1mA, it may burn out the COMS.
16. Input load characteristics in TTL gate circuits (handling special cases of input with resistance):
16.1. When suspended, it is equivalent to connecting the input terminal to a high level. Because at this point, it can be seen as an infinite resistor connected to the input terminal.
16.2. Connect a 10K resistor in series at the input end of the gate circuit and then input a low level. The input end presents a high level instead of a low level.
Because the input load characteristics of the TTL gate circuit indicate that only when the series resistance at the input end is less than 910 ohms, can the low-level signal it receives be recognized by the gate circuit. The input end will remain at a high level no matter how large the series resistance is. This must be noted. The COMS gate circuit does not need to consider these.
17. The TTL circuit has an OC gate with open collector, and the MOS tube also has an OD gate with open drain corresponding to the collector. Its output is called open drain output. When the OC gate is cut off, there is leakage current output, which is leakage current. Why is there leakage current? That‘s because when the transistor is cut off, its base current is about 0, but it‘s not really 0, and the current passing through the collector of the transistor is not really 0, but about 0. And this is the leakage current.
Open drain output: The output of the OC gate is the open drain output; The output of the OD gate is also an open drain output. It can absorb a large amount of current, but cannot output current outward. Therefore, in order to input and output current, it should be used together with the power supply and pull-up resistor.
OD gates are generally used as output buffers/drivers, level converters, and to meet the needs of absorbing large load currents.
18. What is totem pole? What‘s the difference between it and open drain circuit?
In TTL integrated circuit, the output connected with pull up triode is called totem pole output, and the output not connected is called OC gate. Because TTL is a three-stage barrier, and the totem pole is a push-pull connection between two three-stage tubes. So push pull is a totem. General totem output, high-level 400UA, low-level 8MA
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