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Classification and comparison of ESD protection components

Time:2024-04-25 Views:22
Classification and comparison of ESD protection components
    In People‘s Daily work and life, electrostatic discharge (ESD) is ubiquitous, and the rise time of the instant is less than nanoseconds (ns), the duration of hundreds of nanoseconds and up to tens of amperes of the current, which will cause damage to electronic systems such as mobile phones and laptops.
    For electronic system designers, if the appropriate ESD protection measures are not taken, the designed electronic products will be damaged. Therefore, an important issue in the design of electronic systems is to ensure that they can withstand the impact of ESD and continue to work properly.
ESD protection method
    In order to provide ESD protection for electronic systems, you can approach it from different angles. One approach is to build ESD protection architecture into semiconductor chips. However, the shrinking CMOS chips are increasingly insufficient to withstand the area required for internal 2 kV level ESD protection. Truly effective ESD protection cannot be fully integrated into CMOS chips!
    Secondly, you can also work on the physical circuit design, the more sensitive circuit components should be as far away from the through hole or joint, if possible, the grounding of the cable connector should be connected to the grounding of the system before the system signal pin contact, in this way, the discharge event on the cable is less likely to cause interference or damage.
    In addition, software can also contribute to ESD design. The sensor connected to the system is more vulnerable to ESD impact, resulting in the locking of the interface circuit, and the software that can sense the locking situation can be used to reset the interface circuit without operator access.
    However, there are always some circuit points that are more sensitive and difficult to isolate from the outside. Therefore, the most effective method is to use a protective element to divert the current away from the more sensitive element. That is, ESD protection components are placed at the connector or port of the electronic system, so that the current flows through the protection component and does not flow through the sensitive component, so as to maintain the low voltage of the sensitive component, so that it is protected from ESD stress, and the occurrence of ESD events is effectively controlled, as shown in Figure 1. Of course, qualified ESD components must have low leakage and low capacitance, and the function does not decrease under multiple stresses, so as not to reduce the function of the circuit.
    Annex 1: Typical ESD protection element application circuit diagram
Classification of common ESD protection components
    In general, ESD protection components can be classified by their protection strategy and directivity, mainly including varistors, polymers and transient voltage suppressors (TVS), as shown in Table 1. In these protection elements, the varistor shows high resistance at low voltage, where the voltage at both ends of each small diode is quite low, and the current is also quite small; At higher voltages, the individual diodes begin to conduct, and the resistance of the varistor drops. From Table 1 we can also see that the varistor is a bidirectional protection element. For polymers with conductive particles, under normal voltage, these materials have quite high resistance, but when ESD impact occurs, the small gap between the conductive particles will become a sudden gap array, resulting in a low resistance path.
    The transient voltage suppressor (TVS) is a silicon chip element designed with standard and Zener diode characteristics. TVS components are mainly optimized for the requirements of being able to carry large currents with low dynamic resistance, and because TVS components are usually produced in an integrated circuit (IC) way, we can see a wide variety of one-way, two-way and single-chip products arranged in array mode.
Annex 2: Classification of common ESD protection components
    High current performance evaluation of ESD protection components using screen capture and TLP
    Ashton said that under normal operating conditions, ESD protection components should remain inactive without any impact on the functioning of the electronic system, which can be achieved by maintaining a low current and a low capacitance value sufficient to maintain data integrity at a given data transfer rate. Under the conditions of ESD stress impact or large current impact, the first requirement of ESD protection components is that they must be able to work properly and have low enough resistance to limit the voltage of the protected point. Second, it must be able to act quickly so that the rise time is lower than the ESD impact rise time of nanoseconds.
    As we all know, for an electronic system, it must be able to survive the IEC 61000-4-2 standard test conditions. Although most ESD protection components claim to be able to withstand the stress shock levels specified by IEC 61000-4-2, such as 8 kV or Class 4, there is no accepted acceptance standard for testing the high current suppression characteristics of ESD protection components. In this regard, LeIMO Electronics gives its own definition, that is, under the ±10 kV stress voltage (higher than 8 kV) test, the device under test still meets its data sheet specification, and the device characteristics do not change significantly.
    However, to compare the high current suppression characteristics of different ESD protection components, it is also necessary to test and identify them. Comparing screen shots of the waveforms produced by applying a large current shock to different ESD protection components is an important first step.
    Annex 3: Comparison of output waveform of TVS element and varistor under 8kV IEC 61000-4-2 stress shock test
    The screen capture in Figure 3 is an example of this. As can be seen from the figure, the semiconductor TVS element can quickly reduce ESD stress, that is, from 8 kV electrostatic voltage clamping to the level of 5 to 6 V; However, the curve of the varistor drops very slowly and cannot be reduced to a very low level. The curve shows that the recovery time of the TVS device is very short, and the energy that leaks through the TVS device to the back circuit is also very small, which is especially suitable for portable device applications. Under multiple stress conditions, the difference between the two is more prominent. Because TVS uses the diode working principle, after receiving an electric shock, it will immediately break down and then close, and there is no damage to the device, so it can be said that there is no life limit. For varistor, it uses the principle of physical absorption, every time after an ESD event, the material will be subjected to certain physical damage, forming an unrecoverable leakage channel; Moreover, to achieve better absorption results, more materials must be used to increase their volume, thus limiting their application in today‘s miniaturized products.
    In view of this, Lei MAO Electronics made an example, that is, in ESD protection, varistor protection is "Shaolin Kung fu", with the "body (varistor)" to carry hard, will let themselves "very hurt", and TVS play is "tai chi", before ESD stress impact IC, the impact will be "guided open" or "cut off".
    In comparison, the result is that the leakage current of the semiconductor TVS element is less than 0.1 µA at 1,000 8kV IEC 61000-4-2 ESD pulses, while the leakage current of the varistor is more than 100 µA at less than 20 ESD pulses. It can be seen that under the repeated ESD application, TVS can still maintain extremely high performance, while the performance of the varistor will be reduced, and the polymer is also facing similar problems to the varistor.
    However, using oscilloscopes to compare the large current suppression characteristics or I-V curves of different protection elements under ESD stress shock testing is also inadequate. The first is that the changes in V(t) and I(t) on this screen capture are very complex and do not measure basic parameters such as breakdown voltage, maintenance voltage, maintenance current, and secondary breakdown current, which can be analyzed to find the weakness of the circuit design and process.
Annex 4: Schematic diagram of the time domain Reflectometry (TDR) TLP test
    In this case, the Transmission line pulse (TLP) approach is a good next step. The so-called TLP test is a method that uses rectangular short pulses (50~200 ns) to measure the current-voltage characteristic curve of ESD protection components. This short pulse is used to simulate a short ESD pulse acting on the protective element, while a constant-impedance transmission line can generate a square wave of constant amplitude.
    The TLP test is performed by adding a square wave test pulse between two pins of the device under test (DUT). Before TLP test, the transmission line in the circuit should be charged. During the test, the device under test should be connected and the transmission line should be discharged through the device under test. Changing the circuit and input voltage and the length of the transmission line can simulate the ESD pulse at different energies, so as to obtain the ESD high current suppression ability of the device. The TLP test starts with a small voltage pulse and continues to increase until enough data points are obtained to make a complete I-V curve. Usually the amplitude of the test pulse is increased until the DUT is completely damaged in order to obtain its precise maximum permissible pulse current.
    In general, the TLP test method of ESD protection components has outstanding advantages, not only can confirm the screen capture data, but also can be used to analyze the basic parameters of ESD protection components, which is very suitable for comparing different protection components.
    Combined with ESD pulse testing and TLP testing, we can conclude that in different ESD protection components, TVS components, especially semiconductor TVS components, have excellent high current conductivity, and can maintain excellent performance under repeated stress conditions, and there is no problem of performance decline after the use of varistor or polymer. As for its shortcomings in capacitance, it has also eliminated the earlier large capacitance problem with the emergence of new low-capacitance designs.







   
      
      
   
   


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